RFIC Design Engineer - Santa Ana, CA, USA

Position Summary:

  • Responsible for both small signal and large signal circuit design and simulation of RF Frontend blocks such as Switches, PA, LNA, Bandgap, and other circuits.
  • Perform hands-on circuit design, modeling, and verification in either CMOS or SOI or SiGe HBT process. Responsible for corner, PVT, and Monte Carlo simulation.
  • Participate in layout, DRC / LVS, and post-layout optimizations.
  • Perform electro-magnetic (EM) modeling of circuits and block level and beyond including packaging and PCB.
  • As member of RF IC design team, will work with other design engineers to optimize critical performances such as LNA NF and current, PA efficiency, linearity, and ACPR / EVM.
  • Lead / Participate in evaluating, measuring, and debugging silicon until it reaches high volume production.

Required Technical Skills:

  • Must have thorough knowledge of semiconductor process such as CMOS, SOI, and BiCMOS. Knowledge of III-V technologies is a plus.
  • Must have proven design experience in CMOS analog/RFIC blocks above 1GHz.
  • Must be proficient with EDA tools - ADS, Momentum, HFSS, Cadence Spectre / SpectreRF / GoldenGate under Linux / Unix.
  • Direct product development experience (chip level and RF system level) through product definition to mass production is preferred.
  • Must have solid fundamentals in PA, LNA, and switch. Prior design experience with high-speed / high-bandwidth op-amp, band-gap, current source, control logic, LDO, RF detector, coupler, and filter is a plus.
  • SOI / CMOS mmWave IC Design with layout experience is a plus.

Experience and Education:

  • MSEE thesis/PhD dissertation on Multi-GHz CMOS / SOI / BiCMOS wireless transceiver circuit blocks or front-end module are preferred.
  • MSEE / BSEE with 5+ years of industry experience is preferred, fresh PhD is welcome to apply.
  • Team player with a solid communication skill while achieving expected results, working remotely.